The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Jan. 14, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Gilhwan Son, Clifton Park, NY (US);

Hoonseok Seo, Niskayuna, NY (US);

Saehan Park, Clifton Park, NY (US);

Byounghak Hong, Albany, NY (US);

Kang-Ill Seo, Springfield, VA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/74 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/535 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5286 (2013.01); H01L 21/76898 (2013.01); H01L 23/535 (2013.01);
Abstract

Methods of forming an integrated circuit devices may include forming a transistor on a first surface of a substrate. The transistor may include an active region, a source/drain region contacting the active region and a gate electrode on the active region. The methods may also include forming a conductive wire that is electrically connected to the source/drain region, forming a trench extending through the substrate by etching a second surface of the substrate, which is opposite the first surface of the substrate, and forming a power rail in the trench. The power rail is electrically connected to conductive wire.


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