The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Aug. 23, 2021
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Takanori Matsuzaki, Kanagawa, JP;

Tatsuya Onuki, Kanagawa, JP;

Shunpei Yamazaki, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/40 (2006.01); G11C 7/10 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1096 (2013.01); G11C 11/40 (2013.01); G11C 11/4096 (2013.01);
Abstract

A data semiconductor device with a long retention time is provided. The semiconductor device includes a first transistor, a second transistor, a ferroelectric capacitor, a first capacitor, and a memory cell. Note that the memory cell includes a third transistor. A first gate of the first transistor is electrically connected to a first terminal of the ferroelectric capacitor, and a first terminal of the first transistor is electrically connected to a second gate of the first transistor and a first terminal of the second transistor. A second terminal of the second transistor is electrically connected to a second terminal of the ferroelectric capacitor and a first terminal of the first capacitor. A back gate of the third transistor is electrically connected to the first terminal of the first transistor. In the above structure, the threshold voltage of the third transistor can be increased by supplying a negative potential to the first terminal of the first transistor.


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