The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Jul. 08, 2022
Applicants:

Chengdu Boe Optoelectronics Technology Co., Ltd., Sichuan, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Xinyu Wei, Beijing, CN;

Kai Zhang, Beijing, CN;

Qiang Fu, Beijing, CN;

Gang Wang, Beijing, CN;

Erlong Song, Beijing, CN;

Hongmei Fan, Beijing, CN;

Kunyan Shi, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/20 (2006.01); G09G 3/3225 (2016.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
G09G 3/2007 (2013.01); G09G 3/3225 (2013.01); G09G 3/3233 (2013.01); G09G 3/3258 (2013.01); H10K 59/131 (2023.02); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0254 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/0252 (2013.01); G09G 2320/0257 (2013.01); G09G 2320/045 (2013.01); G09G 2320/0626 (2013.01);
Abstract

A pixel circuit and a driving method therefor, a display substrate, and a display apparatus. The pixel circuit includes a driving sub circuit, a data writing sub circuit, a first light-emitting control sub circuit, a first reset sub circuit, and a bias sub circuit; the first reset sub circuit is connected to a first node and configured to write a first reset voltage to the first node in response to a first reset control signal; and the bias sub circuit is connected to a second node and configured to write a reference voltage to the second node in response to a bias control signal, thereby turning on the driving sub circuit.


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