The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Jun. 23, 2023
Applicant:

Red Hat, Inc., Raleigh, NC (US);

Inventors:

Jered J. Floyd, Boston, MA (US);

Ali Ok, Ankara, TR;

Assignee:

Red Hat, Inc., Raleigh, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06N 20/00 (2019.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 9/48 (2013.01); G06F 9/4806 (2013.01); G06F 9/4843 (2013.01); G06F 9/50 (2013.01); G06F 9/5038 (2013.01); G06F 9/505 (2013.01); G06N 20/00 (2019.01);
Abstract

Scheduling multiple processes with varying delay sensitivity is disclosed herein. In one example, a processor device iteratively executes a processing workload that includes a fixed-execution-time process and an adjustable-execution-time process. During each iteration of the processing workload, the processor device first determines, for that iteration, a maximum cycle time interval during which both the fixed-execution-time process and an adjustable-execution-time process will execute. The processor device further determines a maximum execution time interval for the adjustable-execution-time process, based on the maximum cycle time interval and a fixed execution time interval for the fixed-execution-time process. The processor device then modifies an adjustable execution time interval for adjustable-execution-time process in the current iteration of the processing workload based on the maximum execution time interval.


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