The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Mar. 03, 2023
Applicant:

Marvell Asia Pte., Ltd., Singapore, SG;

Inventors:

Weihuang Wang, Los Gatos, CA (US);

Gerald Schmidt, San Jose, CA (US);

Tsahi Daniel, Palo Alto, CA (US);

Saurabh Shrivastava, Saratoga, CA (US);

Assignee:

Marvell Asia Pte, Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 47/20 (2022.01); H04L 12/14 (2024.01); H04L 41/0893 (2022.01); H04L 41/0894 (2022.01); H04L 41/142 (2022.01); H04L 43/0805 (2022.01); H04L 43/0888 (2022.01); H04L 43/0894 (2022.01); H04M 15/00 (2024.01);
U.S. Cl.
CPC ...
H04L 47/20 (2013.01); H04L 12/1407 (2013.01); H04L 12/1435 (2013.01); H04L 41/0894 (2022.05); H04L 43/0805 (2013.01); H04L 43/0888 (2013.01); H04L 43/0894 (2013.01); H04L 41/0893 (2013.01); H04L 41/142 (2013.01); H04M 15/58 (2013.01);
Abstract

Embodiments of the present invention relate to a centralized network analytic device, the centralized network analytic device efficiently uses on-chip memory to flexibly perform counting, traffic rate monitoring and flow sampling. The device includes a pool of memory that is shared by all cores and packet processing stages of each core. The counting, the monitoring and the sampling are all defined through software allowing for greater flexibility and efficient analytics in the device. In some embodiments, the device is a network switch.


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