The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Jul. 13, 2021
Applicant:

Analog Power Conversion Llc, Bend, OR (US);

Inventors:

Amaury Gendron-Hansen, Bend, OR (US);

Dumitru Gheorge Sdrulla, Bend, OR (US);

Leslie Louis Szepesi, Bend, OR (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 29/47 (2006.01); H01L 29/49 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7827 (2013.01); H01L 27/0886 (2013.01); H01L 29/47 (2013.01); H01L 29/4916 (2013.01); H01L 29/78684 (2013.01);
Abstract

A semiconductor device includes a substrate, and a plurality of active regions disposed over the substrate. The plurality of active regions have a first total area. One or more inactive regions are also disposed over the substrate. The one or more inactive regions have a second total area. The second total area is greater than or equal to 1.5 times the first total area. The active regions may be formed in an epitaxial layer formed over the substrate. A plurality of cells of an active device may be disposed in the plurality of active regions. The inactive regions may include only structures that do not dissipate substantial power when the semiconductor device is functioning as it is designed to function.


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