The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2025
Filed:
Jun. 19, 2020
Hefei Xinsheng Optoelectronics Technology Co., Ltd., Anhui, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Ning Liu, Beijing, CN;
Wei Song, Beijing, CN;
Yingbin Hu, Beijing, CN;
Qinghe Wang, Beijing, CN;
Feng Zhang, Beijing, CN;
Chongchong Liu, Beijing, CN;
Bin Zhou, Beijing, CN;
HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., Anhui, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Abstract
An array substrate includes gate lines, data lines and an insulating layer. The data lines all extend in a first direction, and the gate lines all extend in a second direction, the first direction intersecting the second direction. A data line includes first line segments and second line segments that all extend in the first direction and are arranged alternately. The second line segments are disposed at a side of the gate lines proximate to the base, and the first line segments are disposed at a side of the gate lines away from the base. There is no overlap among orthographic projections of the first line segments on the base and orthographic projections of the gate lines on the base. The insulating layer includes first vias. In the first direction, any two adjacent first line segments are electrically connected to a second fine segment through at least two first vias.