The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Nov. 29, 2022
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jung Dal Choi, Hwaseong-si, KR;

Jung Shik Jang, Icheon-si, KR;

Jin Kook Kim, Seongnam-si, KR;

Dong Sun Sheen, Seongnam-si, KR;

Se Young Oh, Seoul, KR;

Ki Hong Lee, Suwon-si, KR;

Dong Hun Lee, Icheon-si, KR;

Sung Hoon Lee, Icheon-si, KR;

Sung Yong Chung, Seongnam-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/30 (2023.01); G11C 5/06 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01);
U.S. Cl.
CPC ...
G11C 5/063 (2013.01); H10B 43/27 (2023.02); H10B 43/30 (2023.02); H10B 43/35 (2023.02);
Abstract

The present technology includes a semiconductor memory device. The semiconductor memory device includes a first channel pattern and a second channel pattern each extending in a vertical direction and facing each other, a channel separation pattern formed between the first channel pattern and the second channel pattern and extending in the vertical direction, a stack including conductive patterns each surrounding the first channel pattern, the second channel pattern, and the channel separation pattern and stacked apart from each other in the vertical direction, a first memory pattern disposed between each of the conductive patterns and the first channel pattern, and a second memory pattern disposed between each of the conductive patterns and the second channel pattern.


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