The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2025
Filed:
Mar. 03, 2023
Seoul National University R&db Foundation, Seoul, KR;
Jong-Ho Lee, Seoul, KR;
Jeong-Hyun Kim, Seoul, KR;
SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, Seoul, KR;
Abstract
Provided is a ferroelectric-based synaptic device and a three-dimensional synaptic device stack using the same. The synaptic device includes a source, a drain, a semiconductor body in which a channel region are formed, a gate electrode, and an insulating layer stack disposed between the semiconductor body and the gate electrode. The insulating layer stack includes: a charge trap layer disposed on the channel region of the semiconductor body and is made of a material capable of storing or trapping electric charges; a ferroelectric layer made of a ferroelectric material; and an insulating layer disposed between the charge trap layer and the ferroelectric layer. The synaptic device is characterized in that weight information is volatilely stored in the charge trap layer and non-volatilely stored in the ferroelectric layer.