The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Feb. 28, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Uijong Song, Suwon-si, KR;

Sunkwon Kim, Suwon-si, KR;

Hyungjoong Kim, Suwon-si, KR;

Seongyoung Ryu, Suwon-si, KR;

Yilho Lee, Suwon-si, KR;

Heejin Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); H10K 59/131 (2023.02); G09G 2300/0814 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0278 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0626 (2013.01); G09G 2330/021 (2013.01);
Abstract

A display apparatus includes plural pixels, a scan driver, a data driver, and a read-out circuit that reads out an electrical characteristic of each of the pixels. Each of the pixels includes a first transistor, a second transistor, a third transistor, a fourth transistor including a first electrode connected with a power node, a second electrode connected with a first node, and a gate connected with a first emission control line, a fifth transistor including a first electrode connected with a third node, a second electrode, and a gate connected with a second emission control line, a sixth transistor including a first electrode connected with a read-out line, a second electrode connected with the third node, and a gate connected a the read-out/initialization control line, a capacitor connected between the first node and the second node, and an organic light-emitting diode.


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