The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

Jun. 23, 2022
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Yuki Okamoto, Ebina, JP;

Tatsuya Onuki, Atsugi, JP;

Hidetomo Kobayashi, Isehara, JP;

Munehiro Kozuma, Atsugi, JP;

Takanori Matsuzaki, Atsugi, JP;

Susumu Kawashima, Atsugi, JP;

Yutaka Okazaki, Isehara, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); H01L 27/088 (2013.01); H01L 27/1225 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0852 (2013.01); G09G 2330/021 (2013.01);
Abstract

The invention of the application is the invention regarding a semiconductor device and a method for driving the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element. The first transistor (M) comprises a back gate, a gate of the first transistor is electrically connected to the first switch (M), the second switch (M) and the first capacitor (C) are positioned between the gate of the first transistor and a source of the first transistor, the back gate of the first transistor is electrically connected to the third switch (M), the second capacitor (C) is positioned between the back gate of the first transistor and the source of the first transistor, the source of the first transistor is electrically connected to the fourth switch (M) and a drain of the second transistor (M), a gate of the second transistor is electrically connected to the fifth switch (M), the third capacitor (C) is positioned between the gate of the second transistor and a source of the second transistor, and the source of the second transistor is electrically connected to the display element ().


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