The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 11, 2025

Filed:

May. 28, 2021
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Can Zheng, Beijing, CN;

Li Wang, Beijing, CN;

Long Han, Beijing, CN;

Jianchao Zhu, Beijing, CN;

Libin Liu, Beijing, CN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/3233 (2016.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01); H10K 59/35 (2023.01); H10K 71/00 (2023.01);
U.S. Cl.
CPC ...
G09G 3/3233 (2013.01); H10K 59/1201 (2023.02); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); H10K 59/353 (2023.02); H10K 71/00 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/043 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/0297 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0242 (2013.01); G09G 2320/0257 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01);
Abstract

Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.


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