The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Dec. 27, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Dan Ioan Dumitru Stoica, Bucharest, RO;

Constantin Crisu, Bucharest, RO;

Constantin Stroi, Bucharest, RO;

Vlad Buiculescu, Bucharest, RO;

Matthias Böhm, Putzbrunn, DE;

Alessandro Caspani, Villach, AT;

Cesare Buffa, Villach, AT;

Franz Michael Darrer, Graz, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); G10L 21/0232 (2013.01); H03M 1/06 (2006.01); H03M 1/34 (2006.01);
U.S. Cl.
CPC ...
H03M 1/34 (2013.01); G10L 21/0232 (2013.01); H03M 1/0626 (2013.01);
Abstract

A sensor circuit, having a startup phase and an operation phase, includes: a sensor configured to generate a sensor signal based on a measured property, wherein the sensor signal has a frequency spectrum defined by a first frequency and a second frequency that is greater than the first frequency; a signal processing circuit including an analog-to-digital converter (ADC) configured to convert the sensor signal into a digital sensor signal; and an offset diagnosis circuit. The offset diagnosis circuit includes: a low pass filter having a cutoff frequency less than the first frequency and configured to generate a filtered signal based on the digital sensor signal; an offset register configured to store a startup signal value of the filtered signal during the startup phase; and an offset comparator circuit configured to set a threshold range based on the startup signal value for use during the operation phase.


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