The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2025
Filed:
Feb. 23, 2022
President and Fellows of Harvard College, Cambridge, MA (US);
Trond I. Andersen, Cambridge, MA (US);
Ryan J. Gelly, Cambridge, MA (US);
Giovanni Scuri, Cambridge, MA (US);
Bo L. Dwyer, Cambridge, MA (US);
Dominik S. Wild, Garching, DE;
Rivka Bekenstein, Cambridge, MA (US);
Andrey Sushko, Cambridge, MA (US);
Susanne F. Yelin, Cambridge, MA (US);
Philip Kim, Cambridge, MA (US);
Hongkun Park, Cambridge, MA (US);
Mikhail D. Lukin, Cambridge, MA (US);
President and Fellows of Harvard College, Cambridge, MA (US);
Abstract
An optical device useful for spatial light modulation. The device comprises: a semiconductor layer having a first surface and a second surface, the semiconductor having an electric field-dependent resonance wavelength; a first electrode electrically connected to the semiconductor layer; a first insulating layer adjacent to the first surface of the semiconductor layer, and a second insulating layer adjacent to the second surface of the semiconducting layer, the first and the second insulating layers each being optically transparent at the resonance wavelength; a first group of at least one gate electrodes disposed adjacent to the first insulating layer, and a second group of at least one gate electrodes disposed adjacent to the second insulating layer, each gate electrode being at least 80% optically transparent at the resonance wavelength; wherein the first and the second groups of gate electrodes, taken together, form at least two regions in the semiconductor layer, an electrostatic field in each of the at least two regions being independently controllable by application of voltage to the first and the second groups of gate electrodes, the at least two regions abutting each other along at least one boundary.