The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Aug. 11, 2023
Applicant:

Deere & Company, Moline, IL (US);

Inventor:

Yueqi Li, San Jose, CA (US);

Assignee:

Deere & Company, Moline, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/35 (2018.01); G06F 8/34 (2018.01); G06F 9/451 (2018.01); G06F 11/36 (2006.01); G06N 3/042 (2023.01); G06N 3/045 (2023.01); G06N 20/00 (2019.01); G06F 17/12 (2006.01); G06Q 30/0241 (2023.01); G06T 11/20 (2006.01); G07G 5/00 (2006.01);
U.S. Cl.
CPC ...
G06F 8/34 (2013.01); G06F 9/451 (2018.02); G06F 11/3608 (2013.01); G06N 3/042 (2023.01); G06N 3/045 (2023.01); G06N 20/00 (2019.01); G06F 17/12 (2013.01); G06Q 30/0277 (2013.01); G06T 11/206 (2013.01); G07G 5/00 (2013.01);
Abstract

Implementations are disclosed for facilitating visual programming of machine learning state machines. In various implementations, one or more graphical user interfaces (GUIs) may be rendered on one or more displays. Each GUI may include a working canvas on which a plurality of graphical elements corresponding to at least some of a plurality of available logical routines are manipulable to define a machine learning state machine. One or more of the available logical routines may include logical operations that process data using machine learning model(s). Two or more at least partially redundant logical routines that include overlapping logical operations may be identified, and overlapping logical operations of the two or more at least partially redundant logical routines may be merged into a consolidated logical routine. At least some of the logical operations that were previously downstream from the overlapping logical operations may be logically coupled with the consolidated logical routine.


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