The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2025

Filed:

Sep. 24, 2021
Applicant:

Proteantecs Ltd., Haifa, IL;

Inventors:

Evelyn Landman, Haifa, IL;

Yair Talker, Binyamina, IL;

Eyal Fayneh, Givatayim, IL;

Yahel David, Kibbutz Gazit, IL;

Shai Cohen, Haifa, IL;

Inbar Weintrob, Givat-Ada, IL;

Assignee:

PROTEANTECS LTD., Haifa, IL;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/3312 (2020.01); G06F 111/08 (2020.01); G06F 119/06 (2020.01); G06F 119/22 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3312 (2020.01); G06F 2111/08 (2020.01); G06F 2119/06 (2020.01); G06F 2119/22 (2020.01);
Abstract

A method comprising using at least one hardware processor for: running a Monte Carlo simulation of possible integrated circuit (IC) process variations of each of a plurality of IC cell types, wherein each of the plurality of IC cell types is defined by multiple specific transistors and multiple specific interconnects; based on the results of the Monte Carlo simulation, creating a library of IC cell types and their corresponding behavioral values for each of the possible IC process variations, and storing the library in a non-transient memory; receiving an IC design embodied as a digital file; correlating the received IC design with the library; and predicting a frequency distribution and a power distribution of ICs manufactured according to the IC design.


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