The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 28, 2025
Filed:
Jul. 13, 2023
Applicant:
Psemi Corporation, San Diego, CA (US);
Inventors:
Miles Sanner, San Diego, CA (US);
Emre Ayranci, Costa Mesa, CA (US);
Assignee:
pSemi Corporation, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/195 (2006.01); H03F 1/02 (2006.01); H03F 1/22 (2006.01); H03F 1/56 (2006.01); H03F 3/16 (2006.01); H03F 3/193 (2006.01); H03F 3/21 (2006.01); H03F 3/72 (2006.01); H04B 1/16 (2006.01);
U.S. Cl.
CPC ...
H03F 3/195 (2013.01); H03F 1/0211 (2013.01); H03F 1/223 (2013.01); H03F 1/56 (2013.01); H03F 3/16 (2013.01); H03F 3/193 (2013.01); H03F 3/211 (2013.01); H03F 3/72 (2013.01); H03F 2200/111 (2013.01); H03F 2200/222 (2013.01); H03F 2200/231 (2013.01); H03F 2200/249 (2013.01); H03F 2200/267 (2013.01); H03F 2200/294 (2013.01); H03F 2200/372 (2013.01); H03F 2200/387 (2013.01); H03F 2200/391 (2013.01); H03F 2200/396 (2013.01); H03F 2200/421 (2013.01); H03F 2200/451 (2013.01); H03F 2200/489 (2013.01); H03F 2200/492 (2013.01); H03F 2203/7209 (2013.01); H04B 1/16 (2013.01);
Abstract
A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a 'common source' configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the gof the input stage of the amplifier, thus improving the noise figure of the amplifier.