The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Apr. 30, 2021
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Hai Jung In, Yongin-si, KR;

Ji Hyun Ka, Yongin-si, KR;

Tae Hoon Kwon, Yongin-si, KR;

Ki Myeong Eom, Yongin-si, KR;

Chae Han Hyun, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/00 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 2300/0809 (2013.01); G09G 2320/0209 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/021 (2013.01);
Abstract

A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.


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