The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Aug. 31, 2018
Applicant:

Mips Tech, Llc, Santa Clara, CA (US);

Inventors:

James Hippisley Robinson, New York, NY (US);

Morgyn Taylor, San Jose, CA (US);

Matthew Fortune, Otley, GB;

Richard Fuhler, San Jose, CA (US);

Sanjay Patel, San Ramon, CA (US);

Assignee:

MIPS Tech, LLC, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 5/01 (2006.01); G06F 9/32 (2018.01); G06F 9/34 (2018.01); G06F 9/355 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30167 (2013.01); G06F 5/01 (2013.01); G06F 9/30014 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01); G06F 9/30112 (2013.01); G06F 9/30134 (2013.01); G06F 9/30145 (2013.01); G06F 9/30149 (2013.01); G06F 9/3016 (2013.01); G06F 9/30192 (2013.01); G06F 9/324 (2013.01); G06F 9/342 (2013.01); G06F 9/355 (2013.01); G06F 9/3861 (2013.01); G06F 9/30032 (2013.01); G06F 9/30163 (2013.01);
Abstract

Instruction set architectures (ISAs) and apparatus and methods related thereto comprise an instruction set that includes one or more instructions which identify the global pointer (GP) register as an operand (e.g., base register or source register) of the instruction. Identification can be implicit. By implicitly identifying the GP register as an operand of the instruction, one or more bits of the instruction that were dedicated to explicitly identifying the operand (e.g., base register or source register) can be used to extend the size of one or more other operands, such as the offset or immediate, to provide longer offsets or immediates.


Find Patent Forward Citations

Robinson, James. (2025). Implicit global pointer relative addressing for global memory access (U.S. Patent No. 12210876). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12210876

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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