Memory device, operating method of the memory device, and memory system including the same

Abstract

In some embodiments, a memory device includes a data sampler configured to sample a data signal based on a write data strobe signal, a measuring circuit configured to measure a temperature-based delay variation and a voltage-based delay variation of a transfer path of the write data strobe signal, a storage circuit configured to store a first coefficient code regulating a reference-based delay variation on the transfer path, a temperature sensor configured to sense the temperature of the transfer path, a monitoring circuit configured to generate a second coefficient code by comparing the sensed temperature, the temperature-based delay variation, the voltage-based delay variation, and the reference-based delay variation with each other, a reference voltage generator configured to generate a reference voltage, a voltage regulator configured to generate a regulation voltage, and a write data strobe signal transfer circuit configured to transfer the write data strobe signal to the data sampler.