The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2025

Filed:

Dec. 10, 2020
Applicant:

Nippon Telegraph and Telephone Corporation, Tokyo, JP;

Inventors:

Tsuyoshi Ito, Tokyo, JP;

Kenji Tanaka, Tokyo, JP;

Yuki Arikawa, Tokyo, JP;

Kazuhiko Terada, Tokyo, JP;

Tsutomu Takeya, Tokyo, JP;

Takeshi Sakamoto, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1044 (2013.01); G06F 9/50 (2013.01);
Abstract

A transfer processing device includes an arithmetic instruction number acquisition circuit, a buffer circuit, a transfer information acquisition circuit, and a software processing unit. The arithmetic instruction number acquisition circuit acquires a transfer instruction number corresponding to transfer information which is information related to the next transfer destination of an arithmetic instruction. The buffer circuit is arranged between the arithmetic instruction number acquisition circuit and the transfer information acquisition circuit, and temporarily stores and relays the arithmetic instruction and the arithmetic instruction number supplied from the arithmetic instruction number acquisition circuit to the transfer information acquisition circuit. The transfer information acquisition circuit acquires transfer information on the basis of the arithmetic instruction number, and gives the acquired transfer information to the arithmetic instruction. The buffer circuit holds the arithmetic instruction number and the arithmetic instruction until an output request from the transfer information acquisition circuit is received.


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