The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Oct. 28, 2021
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Satoru Matsumoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/00 (2023.01); H10B 41/35 (2023.01); H10B 41/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/00 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02);
Abstract

An insulating film is formed on a semiconductor substrate, and a silicon film is formed on the insulating film. The silicon film and the insulating film in a transistor forming region are removed, and the silicon film and the insulating film in a transistor forming region are left. An insulating film is formed on the semiconductor substrate in the transistor forming region. A Hf-containing film is formed on the insulating film and the silicon film, and a silicon film is formed on the Hf-containing film. Then, a gate electrode is formed by patterning the silicon film, and a gate electrode is formed by patterning the silicon film. A gate insulating film under the gate electrode is formed by the insulating film, and a gate insulating film under the gate electrode is formed by the insulating film and the Hf-containing film.


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Matsumoto, Satoru. (2025). Method of manufacturing semiconductor device (U.S. Patent No. 12207464). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12207464

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