The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Aug. 29, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Kyung-ah Jeong, Seoul, KR;

Sun-young Shin, Yongin-si, KR;

Jin-hong Oh, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 19/426 (2014.01); G09G 5/393 (2006.01); H04N 9/79 (2006.01); H04N 19/423 (2014.01); H04N 19/44 (2014.01); H04N 19/86 (2014.01);
U.S. Cl.
CPC ...
H04N 19/426 (2014.11); H04N 9/79 (2013.01); H04N 19/423 (2014.11); G09G 5/393 (2013.01); H04N 19/44 (2014.11); H04N 19/86 (2014.11);
Abstract

A system on a chip may include a codec module configured to receive an image including a plurality of first pixel data and output a plurality of second pixel data through a system bus. The codec module comprises at least one (M+N) bit logic circuit including M bit logic and N bit logic. The codec module is configured to operate in a first mode where the (M+N) bit logic circuit performs a dithering operation on the first pixel data of (M+N) bits and generates the second pixel data including at least M bits. The codec module is configured to operate in a second mode where the M-bit logic selectively operates and outputs the second pixel data of M bits.


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