The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Dec. 17, 2021
Applicant:

Ampleon Netherlands B.v., Nijmegen, NL;

Assignee:

Ampleon Netherlands B.V., Nijmegen, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/14 (2006.01); H01L 23/495 (2006.01); H01L 23/66 (2006.01); H03F 3/213 (2006.01);
U.S. Cl.
CPC ...
H03F 3/213 (2013.01); H01L 23/4952 (2013.01); H01L 23/49562 (2013.01); H01L 23/49589 (2013.01); H01L 23/66 (2013.01); H01L 2223/6655 (2013.01); H03F 2200/451 (2013.01);
Abstract

Example embodiments relate to power amplifier devices and semiconductor dies. One example power amplifier device includes a semiconductor die having a first input terminal and a first output terminal. The power amplifier device also includes a power transistor integrated on the semiconductor die and including a second input terminal and a second output terminal arranged at an input side and output side of the power transistor, respectively. The power transistor has an output capacitance. Further, the power amplifier device includes a shunt network that includes a plurality of first bondwires arranged in series with a first capacitor. The first capacitor is arranged near the input side of the power transistor. At one end of the shunt network one end of the plurality of first bondwires is coupled to the second output terminal. Additionally, the power amplifier includes a pair of coupled lines formed on the semiconductor die.


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