The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Aug. 02, 2022
Applicant:

The Government of the United States, As Represented BY the Secretary of the Navy, Arlington, VA (US);

Inventors:

Edward H. Aifer, Arlington, VA (US);

Jerry R. Meyer, Catonsville, MD (US);

Chadwick Lawrence Canedy, Washington, DC (US);

Igor Vurgaftman, Severna Park, MD (US);

Jill A. Nolde, Takoma Park, MD (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0352 (2006.01); H01L 31/0304 (2006.01); H01L 31/109 (2006.01); H01L 31/18 (2006.01);
U.S. Cl.
CPC ...
H01L 31/035236 (2013.01); H01L 31/03046 (2013.01); H01L 31/109 (2013.01); H01L 31/1844 (2013.01);
Abstract

An infrared detector and a method for forming it are provided. The detector includes absorber, barrier, and contact regions. The absorber region includes a first semiconductor material, with a first lattice constant, that produces charge carriers in response to infrared light. The barrier region is disposed on the absorber region and comprises a superlatice that includes (i) first barrier region layers comprising the first semiconductor material, and (ii) second barrier region layers comprising a second semiconductor material, different from, but lattice matched to, the first semiconductor material. The first and second barrier region layers are alternatingly arranged. The contact region is disposed on the barrier region and comprises a superlattice that includes (i) first contact region layers comprising the first semiconductor material, and (ii) second contact region layers comprising the second semiconductor material layer. The first and second contact region layers are alternatingly arranged.


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