The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2025

Filed:

Sep. 12, 2019
Applicant:

Aisin Corporation, Aichi, JP;

Inventor:

Takanobu Naruse, Kariya, JP;

Assignee:

AISIN CORPORATION, Aichi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/12 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01); H01L 25/065 (2023.01); H05K 1/02 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 23/12 (2013.01); H01L 23/49838 (2013.01); H01L 23/50 (2013.01); H01L 25/0655 (2013.01); H05K 1/0218 (2013.01); H05K 1/182 (2013.01);
Abstract

The present invention supplies electric power to a semiconductor module appropriately and also curbs the number of wiring layers of a main substrate on which the semiconductor module is mounted. A semiconductor device () is provided with a main substrate () and a semiconductor module (). A first power supply circuit (), the semiconductor module (), and a first element () are mounted on the main substrate (). The semiconductor module () is provided with a second element () and a module substrate () on which the second element () is mounted. The first power supply circuit () supplies electric power (Vcc) to the first element (). The semiconductor module () is further provided with a second power supply circuit () mounted on the module substrate (), and the second power supply circuit () supplies electric power (Vcc) to the second element ().


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