The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2025
Filed:
Nov. 07, 2023
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventors:
Moon Sik Seo, Icheon-si, KR;
Dae Hwan Yun, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2023.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H10B 41/27 (2023.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H01L 21/0214 (2013.01); H01L 21/02164 (2013.01); H01L 21/0223 (2013.01); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H10B 41/27 (2023.02); H10B 63/34 (2023.02); H10B 63/845 (2023.02); H10N 70/041 (2023.02); H10N 70/066 (2023.02);
Abstract
A method of manufacturing a semiconductor device may include forming a stack with alternately stacked first material layers and second material layers, forming an opening passing through the stack, forming a memory layer in the opening, forming a slit passing through the stack and exposing the first material layers and the second material layers, and forming first barrier patterns, without removing the second material layers, by partially oxidizing the memory layer through the second material layers.