The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Mar. 01, 2023
Applicant:

Deere & Company, Moline, IL (US);

Inventors:

Lav Thyagarajan, West Fargo, ND (US);

Morgan E. Schlichtmann, Fargo, ND (US);

Christopher J. Tremel, West Fargo, ND (US);

David M. Loken, West Fargo, ND (US);

Assignee:

DEERE & COMPANY, Moline, IL (US);

Primary Examiner:
Int. Cl.
CPC ...
H02M 7/48 (2007.01); H02J 3/38 (2006.01); H02M 1/00 (2006.01); H02M 7/521 (2006.01); H02M 7/5387 (2007.01); H02P 27/08 (2006.01);
U.S. Cl.
CPC ...
H02M 1/0074 (2021.05); H02J 3/38 (2013.01); H02M 1/0009 (2021.05); H02M 1/0043 (2021.05); H02M 7/521 (2013.01); H02P 27/08 (2013.01); H02J 2203/20 (2020.01); H02M 1/009 (2021.05); H02M 7/48 (2013.01); H02M 7/53871 (2013.01);
Abstract

A capacitor has a known capacitance value for filtering the ripple current of the DC voltage bus. A first modulation index estimator is configured to estimate a first modulation index of the first inverter. A second modulation index estimator configured to estimate a second modulation index of the second inverter. A current estimator is configured to estimate an interleaving phase shift angle associated with a respective one of a set of inverters based on the known capacitance value of the capacitor, the estimated first modulation index, the estimated second modulation index, the first control input and the second control input.


Find Patent Forward Citations

Thyagarajan, Lav. (2025). System and method for controlling parallel inverters coupled to common dc bus capacitor (U.S. Patent No. 12199496). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12199496

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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