The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

May. 08, 2024
Applicant:

Aurora Operations, Inc., Pittsburgh, PA (US);

Inventor:

Lei Wang, Fremont, CA (US);

Assignee:

AURORA OPERATIONS, INC., Pittsburgh, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/306 (2006.01); H01L 21/3065 (2006.01); H01L 21/3105 (2006.01); H01L 21/78 (2006.01); G01S 7/481 (2006.01); G01S 17/931 (2020.01);
U.S. Cl.
CPC ...
H01L 27/14687 (2013.01); H01L 21/30608 (2013.01); H01L 21/3065 (2013.01); H01L 21/31051 (2013.01); H01L 21/78 (2013.01); H01L 27/14627 (2013.01); H01L 27/14698 (2013.01); G01S 7/4811 (2013.01); G01S 17/931 (2020.01);
Abstract

A method for manufacturing a semiconductor optical device for a LIDAR sensor system for a vehicle includes (a) forming a plurality of microlens structures at respective first locations on a first major surface of respective first and second semiconductor wafers. The method includes (b) forming a plurality of notch structures at respective second locations on a second major surface of the respective first and second semiconductor wafers, wherein the respective second locations on the second major surface are substantially opposite the respective first locations on the first major surface. The method includes (c) bonding the second major surface of the first semiconductor wafer to the second major surface of the second semiconductor wafer to form a semiconductor wafer pair. The method includes (d) dicing the semiconductor wafer pair to segment the semiconductor wafer pair into a plurality of individual semiconductor optical devices.


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