The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

May. 16, 2023
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventors:

Kouhei Toyotaka, Kanagawa, JP;

Jun Koyama, Kanagawa, JP;

Hiroyuki Miyake, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 19/00 (2006.01); G02F 1/1334 (2006.01); G02F 1/1337 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G09G 3/20 (2006.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); G09G 3/36 (2006.01); G11C 19/28 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G02F 1/1334 (2013.01); G02F 1/1337 (2013.01); G02F 1/134336 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 3/20 (2013.01); G09G 3/3233 (2013.01); G09G 3/3258 (2013.01); G09G 3/3648 (2013.01); G11C 19/28 (2013.01); G11C 19/287 (2013.01); H01L 27/1225 (2013.01); H01L 29/7869 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); G09G 3/3677 (2013.01); G09G 3/3688 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0626 (2013.01); G09G 2330/021 (2013.01);
Abstract

A semiconductor device includes first and second transistors having the same conductivity type and a circuit. One of a source and a drain of the first transistor is electrically connected to that of the second transistor. First and third potentials are supplied to the circuit through respective wirings. A second potential and a first clock signal are supplied to the others of the sources and the drains of the first and second transistors, respectively. A second clock signal is supplied to the circuit. The third potential is higher than the second potential which is higher than the first potential. A fourth potential is equal to or higher than the third potential. The first clock signal alternates the second and fourth potentials and the second clock signal alternates the first and third potentials. The circuit controls electrical connections between gates of the first and second transistors and the wirings.


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