The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Sep. 07, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Kazuhiro Hiwada, Kamakura, JP;

Tomoya Suzuki, Ota, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 12/1009 (2013.01); G06F 2212/60 (2013.01);
Abstract

According to one embodiment, a controller of a memory system manages 2banks obtained by dividing a logical address space, and 2regions included in a nonvolatile memory, the 2regions corresponding one-to-one to the 2banks. The controller stores an address translation table in a random access memory, the address translation table including a plurality of entries respectively corresponding to a plurality of logical addresses which are contiguous in units of a first size corresponding to granularity of data read/write-accessed by a host, the address translation table managing mapping between each of the logical addresses and each of physical addresses. The controller allocates 2write buffers to the random access memory.


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