The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2025

Filed:

Jan. 29, 2024
Applicant:

Beijing Tenafe Electronic Technology Co., Ltd., Beijing, CN;

Inventors:

Meng Kun Lee, Cupertino, CA (US);

Priyanka Nilay Thakore, Mountain View, CA (US);

Chen Xiu, Beijing, CN;

Lyle E. Adams, San Jose, CA (US);

Xiaojun Ding, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1694 (2013.01); G06F 13/1689 (2013.01); G06F 2213/0038 (2013.01);
Abstract

If a first group selection setting is set to TRUE, an NVM Express (NVMe) processor sends a first set of NVMe status information that includes a transfer data end event. If a second group selection setting is set to TRUE, the NVMe processor sends a second set of NVMe status information that includes an NVMe error event. A firmware functional module sends firmware status information. The aggregation module aggregates and timestamps the first and second sets of NVMe status information, if any, and the firmware status information to obtain a timestamped and aggregated message stream that is output by an interface. The timestamped and aggregated message stream enables a visualization system to analyze the NVMe processor and the firmware functional module. The NVMe processor, firmware functional module, aggregation module, and interface are in a storage controller, implemented on a system on chip (SOC), that manages a storage medium.


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