The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2025
Filed:
Apr. 19, 2023
Dell Products L.p., Round Rock, TX (US);
Tuyet-Huong Thi Nguyen, Cedar Park, TX (US);
Wei Liu, Austin, TX (US);
Austin Patrick Bolen, Austin, TX (US);
Dell Products L.P., Round Rock, TX (US);
Abstract
A Peripheral Component Interconnect express (PCIe) Downstream Port Containment (DPC) System Management Interrupt (SMI) storm prevention system includes a Basic Input/Output System (BIOS) subsystem coupled to a first PCIe device. In response to an error being experienced in the first PCIe device and causing the first PCIe device to perform DPC operations, the BIOS subsystem receives a plurality of SMIs that are each configured to begin a System Management Mode (SMM). The BIOS subsystem tracks a number of the plurality of SMIs in a BIOS database and determines when the number of the plurality of SMIs has reached a DPC SMI storm threshold. In response to the number of the plurality of SMIs reaching the DPC SMI storm threshold, the BIOS subsystem prevents use of a link to the first PCIe device and prevents an operating system from performing recovery operations to recover the first PCIe device from the error.