The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Jun. 03, 2022
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Ying-Cheng Chuang, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/05 (2023.02); H01L 29/66742 (2013.01); H01L 29/78642 (2013.01); H10B 12/036 (2023.02); H10B 12/33 (2023.02);
Abstract

A method of manufacturing a semiconductor device is provided. The method includes: providing a substrate; forming a metallization layer on the substrate; forming an upper dielectric layer over the metallization layer; forming a first sacrificial layer and a second sacrificial layer, each of which penetrates the upper dielectric layer and the metallization layer; removing the upper dielectric layer; forming a width controlling structure between the first sacrificial layer and the second sacrificial layer, wherein the width controlling structure defines a recess exposing the metallization layer; forming a protective layer within the recess of the width controlling structure; removing the width controlling structure to expose a portion of the metallization layer; and patterning the metallization layer to form a word line between the first sacrificial layer and the second sacrificial layer.


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