The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Jul. 30, 2021
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Masahiro Kobayashi, Tokyo, JP;

Mineo Shimotsusa, Machida, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 25/79 (2023.01); H01L 27/02 (2006.01); H01L 27/146 (2006.01); H10K 65/00 (2023.01);
U.S. Cl.
CPC ...
H04N 25/79 (2023.01); H01L 27/0255 (2013.01); H01L 27/0296 (2013.01); H01L 27/146 (2013.01); H01L 27/14636 (2013.01); H01L 27/1464 (2013.01); H01L 27/14685 (2013.01); H01L 27/14689 (2013.01); H10K 65/00 (2023.02); H01L 27/14645 (2013.01);
Abstract

A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.


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