The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2025
Filed:
Jan. 31, 2023
Applicant:
Cisco Technology, Inc., San Jose, CA (US);
Inventors:
Abhishek Bhat, Allentown, PA (US);
Sujit Handanhal Ramachandra, Allentown, PA (US);
Assignee:
CISCO TECHNOLOGY, INC., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/107 (2006.01); H01S 3/13 (2006.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H03L 7/1075 (2013.01); H01S 3/13 (2013.01); H03L 7/0818 (2013.01);
Abstract
Techniques to reduce or eliminate phase noise and jitter from a noisy clock signal. A method includes generating an electrical clock signal, generating a delayed optical clock signal based on the electrical clock signal, detecting a phase difference between the electrical clock signal and the delayed optical clock signal, and processing, based on the phase difference, the electrical clock signal to obtain a reduced phase noise version of the electrical clock signal.