The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2025
Filed:
Oct. 02, 2023
Applicant:
Dell Products L.p., Round Rock, TX (US);
Inventors:
Qinghong He, Austin, TX (US);
Isaac Q. Wang, Austin, TX (US);
Assignee:
Dell Products L.P., Round Rock, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 21/50 (2006.01); H01L 23/14 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H05K 1/02 (2006.01); H05K 1/11 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/3677 (2013.01); H01L 21/50 (2013.01); H01L 23/14 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H05K 1/0201 (2013.01); H05K 1/115 (2013.01); H01L 23/5385 (2013.01); H01L 25/0657 (2013.01); H01L 2224/0554 (2013.01); H01L 2224/32145 (2013.01); H01L 2924/15311 (2013.01);
Abstract
An information handling system includes a printed circuit board (PCB) and an integrated circuit device. The integrated circuit device includes a substrate and a die that is bonded via a first surface of the die to a first surface of the substrate. The substrate includes a ball grid array (BGA) on the first surface of the substrate. The integrated circuit device is bonded to a first surface of the PCB via the BGA. The die is collocated with the cutout area.