The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Mar. 31, 2022
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Wei-Chen Pan, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01); H01L 21/02 (2006.01); H01L 21/033 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76808 (2013.01); H01L 21/0206 (2013.01); H01L 21/0337 (2013.01); H01L 21/0332 (2013.01); H01L 21/76829 (2013.01); H01L 23/5226 (2013.01); H01L 23/53228 (2013.01);
Abstract

The present application discloses a method for fabricating a semiconductor device including providing a substrate; forming a dielectric layer on the substrate; forming a via opening in the dielectric layer using a first mask layer as a mask; forming a failed hard mask layer to fill the via opening; forming a second mask layer on the failed hard mask layer; removing the second mask layer and the failed hard mask layer; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; forming a third mask layer on the top hard mask layer; patterning the top hard mask layer using the third mask layer as a mask; forming a trench opening in the dielectric layer using the top hard mask layer as a mask; and forming a via in the via opening and forming a trench in the trench opening.


Find Patent Forward Citations

Pan, Wei-Chen. (2025). Method for fabricating semiconductor device and reworking process (U.S. Patent No. 12191194). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12191194

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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