The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

May. 31, 2023
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventor:

Se Chun Park, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/12 (2006.01); G11C 11/4099 (2006.01); G11C 16/34 (2006.01); G11C 29/02 (2006.01); G11C 29/50 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 29/12005 (2013.01); G11C 11/4099 (2013.01); G11C 16/34 (2013.01); G11C 29/021 (2013.01); G11C 29/025 (2013.01); G11C 29/50 (2013.01); G11C 29/50004 (2013.01); G11C 29/52 (2013.01); G11C 2029/1204 (2013.01); G11C 2207/063 (2013.01);
Abstract

The present technology relates to an electronic device. According to the present technology, a memory device may include a plurality of memory cells, a defect detector, and a test controller. The defect detector may generate defect information indicating a defect state in which a value of a cell current measured in a sensing operation on selected memory cells among the plurality of memory cells is less than a threshold value. The test controller may count fail bits from a result of a test operation performed on the selected memory cells using a test reference current in response to the defect information, and set a bit line voltage to be used in the sensing operation based on a comparison result between a number of fail bits detected in the test operation and a reference number.


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