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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12190968 B1

PDFFull Text
Date of Patent:
Jan. 07, 2025

Filed:

Jan. 23, 2024

Memory circuit, system and method for rapid retrieval of data sets

Applicant:

Sunrise Memory Corporation, San Jose, CA (US);

Inventor:

Eli Harari, Saratoga, CA (US);

Assignee:

SUNRISE MEMORY CORPORATION, San Jose, CA (US);

Attorneys:

Edward C. Kwok

VLP Law Group LLP

Primary Examiner:

Jerome Leboeuf

Int. Cl.
CPC ...
G11C 16/34 (2006.01); G06F 17/16 (2006.01); G06N 3/063 (2023.01); G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); H01L 21/28 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 29/792 (2006.01); H01L 29/92 (2006.01); H10B 43/27 (2023.01); H10B 43/10 (2023.01);
U.S. Cl.
CPC ...
G11C 16/3431 (2013.01); G06F 17/16 (2013.01); G06N 3/063 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 11/5642 (2013.01); G11C 16/0416 (2013.01); G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); G11C 16/0491 (2013.01); G11C 16/10 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/40117 (2019.08); H01L 29/66833 (2013.01); H01L 29/78633 (2013.01); H01L 29/7926 (2013.01); H01L 29/92 (2013.01); H10B 43/27 (2023.02); H10B 43/10 (2023.02);
Abstract

A 3-dimensional array of NOR memory strings being organized by planes of NOR memory strings, in which (i) the storage transistors in the NOR memory strings situated in a first group of planes are configured to be programmed, erased, program-inhibited or read in parallel, and (ii) the storage transistors in NOR memory strings situated within a second group of planes are configured for storing resource management data relating to data stored in the storage transistors of the NOR memory strings situated within the first group of planes, wherein the storage transistors in NOR memory strings in the second group of planes are configured into sets.

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