The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Dec. 16, 2022
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventor:

Atsushi Umezaki, Kanagawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G09G 3/20 (2006.01); G11C 19/28 (2006.01); H03K 3/356 (2006.01); H03K 5/15 (2006.01); H03K 4/02 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3674 (2013.01); G09G 3/20 (2013.01); G09G 3/3688 (2013.01); G11C 19/28 (2013.01); H03K 3/356026 (2013.01); H03K 5/15066 (2013.01); H03K 5/15093 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G11C 19/287 (2013.01); H03K 4/026 (2013.01);
Abstract

A first flipflop outputs a first signal synchronized with a first clock signal. In the first transistor, the first clock signal is input to a first terminal and the second signal is output from a second terminal. In the fourth transistor, a first signal is input to a first terminal and a second terminal is electrically connected to a gate of the first transistor. In the sixth transistor, the third signal is input to a first terminal, a second terminal is electrically connected to the gate of the fourth transistor, and the gate of the sixth transistor is electrically connected to the first terminal.


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