The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2025

Filed:

Dec. 29, 2020
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Yao-Hua Chen, Changhua County, TW;

Yu-Xiang Yen, Chiayi County, TW;

Wan-Shan Hsieh, Taoyuan, TW;

Chih-Tsun Huang, Hsinchu, TW;

Juin-Ming Lu, Hsinchu, TW;

Jing-Jia Liou, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 9/48 (2006.01); G06N 3/049 (2023.01); G06N 3/063 (2023.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06N 3/049 (2013.01); G06F 9/4881 (2013.01); G06F 15/8023 (2013.01); G06F 15/8046 (2013.01); G06N 3/063 (2013.01); G06F 9/5027 (2013.01);
Abstract

A processing element architecture adapted to a convolution comprises a plurality of processing elements and a delayed queue circuit. The plurality of processing elements includes a first processing element and a second processing element, wherein the first processing element and the second processing element perform the convolution according to a shared datum at least. The delayed queue circuit connects to the first processing element and connects to the second processing element. The delayed queue circuit receives the shared datum sent by the first processing element, and sends the shared datum to the second processing element after receiving the shared datum and waiting for a time interval.


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