The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Jul. 29, 2021
Applicant:
Omnivision Technologies, Inc., Santa Clara, CA (US);
Inventor:
Zheng Yang, San Jose, CA (US);
Assignee:
OMNIVISION TECHNOLOGIES, INC., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 23/11 (2023.01); H04N 23/84 (2023.01); H04N 25/13 (2023.01); H04N 25/131 (2023.01); H04N 25/40 (2023.01); H04N 25/44 (2023.01); H04N 25/441 (2023.01);
U.S. Cl.
CPC ...
H04N 23/11 (2023.01); H04N 23/84 (2023.01); H04N 25/131 (2023.01); H04N 25/135 (2023.01); H04N 25/40 (2023.01); H04N 25/44 (2023.01); H04N 25/441 (2023.01);
Abstract
An imaging device includes a pixel array including a 4×4 grouping of pixel circuits. The 4×4 grouping of pixel circuits includes four rows and four columns of the pixel array. A plurality of bitlines includes a first bitline, a second bitline, a third bitline, and a fourth bitline. Each one of the first, second, third, and fourth bitlines is coupled to a respective four pixel circuits in the 4×4 grouping of pixel circuits. Each one of the first, second, third, and fourth bitlines is coupled to all four of the rows and to all four of the columns of the 4×4 grouping of pixel circuits.