The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

May. 12, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Yantao Song, Northville, MI (US);

Chanwit Prasantanakorn, Santa Clara, CA (US);

Bharat K Patel, San Martin, CA (US);

Abby Cherian, Fremont, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/42 (2007.01); H02M 1/00 (2006.01); H02M 3/335 (2006.01); H02M 7/21 (2006.01); H02M 7/217 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33592 (2013.01); H02M 1/007 (2021.05); H02M 1/4208 (2013.01); H02M 1/4258 (2013.01); H02M 7/217 (2013.01); H02M 1/4225 (2013.01); H02M 3/33507 (2013.01); H02M 3/33523 (2013.01); H02M 3/33569 (2013.01);
Abstract

A power converter can include a DC-DC converter having an output with an active power buffer coupled thereto. The active power buffer can include an energy storage capacitor and one or more switching devices selectively coupling the capacitor to the output to alternately store energy in and discharge energy from the capacitor. Control circuitry can include a DC-DC converter control loop that operates the DC-DC converter to regulate an average voltage across the capacitor and an active power buffer control loop that operates the one or more switching devices of the active power buffer to regulate an output voltage of the power converter. The DC-DC converter control loop can include a relatively slower control loop that controls the DC-DC converter during steady state load conditions and at least one relatively faster control loop that controls the DC-DC converter during transient load conditions.


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