The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Dec. 19, 2023
Applicant:
Japan Display Inc., Tokyo, JP;
Inventors:
Takayuki Suzuki, Tokyo, JP;
Hiroyuki Abe, Tokyo, JP;
Assignee:
Japan Display Inc., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/1345 (2006.01); G02F 1/1368 (2006.01); G11C 19/28 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3677 (2013.01); G02F 1/1345 (2013.01); G02F 1/1368 (2013.01); G11C 19/28 (2013.01); G11C 19/287 (2013.01); G02F 1/136286 (2013.01); G02F 1/136295 (2021.01); G02F 2201/56 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01);
Abstract
A display device with a variant-shape display region other than the rectangular display region is configured to form a scanning line drive circuit along the variant-shape display region. The scanning line drive circuit includes bus wiring group with clock wiring for supplying clocks with three or more phases and the power supply wiring for supplying power, and the unit circuits for configuring the shift register including five or more transistors. The bus wiring and the unit circuits are formed on the different regions so as not to cross with one another.