The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Sep. 25, 2023
Amazon Technologies, Inc., Seattle, WA (US);
Paul Gilbert Meyer, Jericho, VT (US);
Thiam Khean Hah, San Jose, CA (US);
Randy Renfu Huang, Morgan Hill, CA (US);
Ron Diamant, Santa Clara, CA (US);
Vignesh Vivekraja, Santa Clara, CA (US);
Amazon Technologies, Inc., Seattle, WA (US);
Abstract
A systolic array can implement an architecture tailored to perform matrix multiplications on sparse matrices. Each processing element in the systolic array may include a register configured to store a value, and a multiplexor configured to select an input element from multiple input data buses based on metadata associated with the value. Each processing element may also include a multiplier configured to multiply the selected input element with the value to generate a multiplication result, and an adder configured to add the multiplication result to a partial sum input to generate a partial sum output.