The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

Mar. 08, 2022
Applicant:

Microsoft Technology Licensing, Llc, Redmond, WA (US);

Inventor:

Ishwar Agarwal, Redmond, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 9/50 (2006.01); G06F 12/02 (2006.01); G06F 12/06 (2006.01); G06F 12/0891 (2016.01);
U.S. Cl.
CPC ...
G06F 9/5016 (2013.01); G06F 9/5022 (2013.01); G06F 12/0238 (2013.01); G06F 12/0891 (2013.01); G06F 12/0615 (2013.01); G06F 2209/5011 (2013.01); G06F 2209/503 (2013.01); G06F 2209/509 (2013.01); G06F 2212/254 (2013.01);
Abstract

Systems and methods related to integrated memory pooling and direct swap caching are described. A system includes a compute node comprising a local memory and a pooled memory. The system further includes a host operating system (OS) having initial access to: (1) a first swappable range of memory addresses associated with the local memory and a non-swappable range of memory addresses associated with the local memory, and (2) a second swappable range of memory addresses associated with the pooled memory. The system further includes a data-mover offload engine configured to perform a cleanup operation, including: (1) restore a state of any memory content swapped-out from a memory location within the first swappable range of memory addresses to the pooled memory, and (2) move from the local memory any memory content swapped-in from a memory location within the second swappable range of memory addresses back out to the pooled memory.


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