The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2024

Filed:

May. 04, 2023
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Alexander Cole Shulyak, Austin, TX (US);

Yasuo Ishii, Austin, TX (US);

Dam Sunwoo, Austin, TX (US);

Houdhaifa Bouzguarrou, Austin, TX (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 12/0875 (2016.01);
U.S. Cl.
CPC ...
G06F 9/3806 (2013.01); G06F 12/0875 (2013.01); G06F 2212/452 (2013.01);
Abstract

An apparatus is provided having pointer storage to store pointer values for a plurality of pointers, with the pointer values of the pointers being differentially incremented in response to a series of increment events. Tracker circuitry maintains a plurality of tracker entries, each tracker entry identifying a control flow instruction and a current active pointer (from amongst the pointers) to be associated with that control flow instruction. Cache circuitry maintains a plurality of cache entries, each cache entry storing a resolved behaviour of an instance of a control flow instruction identified by a tracker entry along with an associated tag value generated when the resolved behaviour was allocated into that cache entry. For a given entry the associated tag value may be generated in dependence on an address indication of the control flow instruction whose resolved behaviour is being stored in that entry and the current active pointer associated with that control flow instruction. Prediction circuitry is responsive to a prediction trigger associated with a replay of a given instance of a given control flow instruction identified by a tracker entry, to cause a lookup operation to be performed by the cache circuitry using a comparison tag value generated in dependence on the address indication of the given control flow instruction and the current active pointer. In the event of a hit being detected in a given cache entry, the resolved behaviour stored in the given cache entry is used as the predicted behaviour of the given instance of the given control flow instruction, provided a prediction confidence metric is met.


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