The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2024

Filed:

Dec. 16, 2022
Applicant:

Bae Systems Controls Inc., Endicott, NY (US);

Inventors:

Robert J. Vovos, Vestal, NY (US);

Andrew S. Clark, Binghamton, NY (US);

Assignee:

BAE Systems Controls Inc., Endicott, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/12 (2006.01); H01F 27/28 (2006.01); H02M 1/08 (2006.01); H02M 1/088 (2006.01); H02M 1/44 (2007.01); H02M 7/5387 (2007.01); H01F 17/00 (2006.01); H01F 41/069 (2016.01);
U.S. Cl.
CPC ...
H02M 1/123 (2021.05); H01F 27/2895 (2013.01); H02M 1/08 (2013.01); H02M 1/088 (2013.01); H02M 1/44 (2013.01); H02M 7/5387 (2013.01); H01F 2017/0093 (2013.01); H01F 41/069 (2016.01);
Abstract

A multi-wire choke filter is implemented in an inverter module of a modular power control system for a vehicle. Such an inverter module includes gate driver circuits to control switching power transistors used to power loads in a vehicle. The switching power transistors and gate drivers are configurable to support both a three-phase and a single phase current drive driver circuit topology in which switching power transistors are connected in parallel to share driving currents and dynamic switching losses. In any configured topology, the multi-wire choke is connected in series between gate driver circuit components and switching power transistors to mitigate any EMI threat to the gate driver circuitry by presenting an impedance to reduce circuit susceptibility to any differential and common mode noise currents that can flow through the gate driver circuit that can overwhelm gate driver circuitry and negatively effect power transistor switching performance at any time.


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