The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2024

Filed:

Jun. 28, 2022
Applicant:

Infinera Corporation, San Jose, CA (US);

Inventors:

Fu-Tai An, San Jose, CA (US);

Mariam Hoseini, San Jose, CA (US);

Jan-Harm Nieland, Santa Clara, CA (US);

Assignee:

Infinera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/78 (2006.01); H03M 1/76 (2006.01);
U.S. Cl.
CPC ...
H03M 1/785 (2013.01); H03M 1/76 (2013.01);
Abstract

Circuitry is disclosed herein that dynamically (temperature-invariant and voltage-invariant) adjusts the Ron of switches in a resistive Nyquist-rate digital to analog converter (DAC) to thereby reduce DAC nonlinearity errors and improve INL results of greater than 16b. Consistent with the present disclosure, the DAC includes an R-2R ladder in which each bit corresponds to a switch. A control circuit is provided for generating signals applied to the gate of the switch to cause the on-resistances of the switch to be a particular value, such that the on-resistance of the switch plus the sum of two resistors, one having the resistance R, and the other having a resistance R' is equivalent to the resistance of the 2R-size resistors or twice the resistance of the R-sized resistors in the ladder.


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